- 专利标题： NAND data placement schema
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申请号： US18075027申请日： 2022-12-05
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公开(公告)号： US11955189B2公开(公告)日： 2024-04-09
- 发明人: Carminantonio Manganelli , Paolo Papa , Massimo Iaculo , Giuseppe D'Eliseo , Alberto Sassara
- 申请人： Micron Technology, Inc.
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Schwegman Lundberg & Woessner, P.A.
- 主分类号： G11C11/34
- IPC分类号： G11C11/34 ; G11C16/10 ; G11C16/26 ; G11C16/34 ; G11C29/42 ; H03K19/02
摘要：
Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios.
The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.
The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.
公开/授权文献
- US11869606B2 NAND data placement schema 公开/授权日：2024-01-09
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