- Patent Title: Adjusting work function through adjusting deposition temperature
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Application No.: US17838785Application Date: 2022-06-13
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Publication No.: US12009264B2Publication Date: 2024-06-11
- Inventor: Hsin-Yi Lee , Ji-Cheng Chen , Cheng-Lung Hung , Weng Chang , Chi On Chui
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16870485 2020.05.08
- Main IPC: H01L29/51
- IPC: H01L29/51 ; C23C16/34 ; C23C16/455 ; H01L21/28 ; H01L21/285 ; H01L21/764 ; H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L29/08 ; H01L29/417 ; H01L29/45 ; H01L29/49 ; H01L29/66

Abstract:
A method includes forming isolation regions extending into a semiconductor substrate, and recessing the isolation regions. After the recessing, a portion of a semiconductor material between the isolation region protrudes higher than top surfaces of the isolation regions to form a semiconductor fin. The method further includes forming a gate stack, which includes forming a gate dielectric on sidewalls and a top surface of the semiconductor fin, and depositing a titanium nitride layer over the gate dielectric as a work-function layer. The titanium nitride layer is deposited at a temperature in a range between about 300° C. and about 400° C. A source region and a drain region are formed on opposing sides of the gate stack.
Public/Granted literature
- US20220310451A1 Adjusting Work Function Through Adjusting Deposition Temperature Public/Granted day:2022-09-29
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