Invention Grant
- Patent Title: Analog-to-digital converter (ADC) having linearization circuit with reconfigurable lookup table (LUT) memory and calibration options
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Application No.: US17825864Application Date: 2022-05-26
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Publication No.: US12074607B2Publication Date: 2024-08-27
- Inventor: Narasimhan Rajagopal , Nithin Gopinath , Viswanathan Nagarajan , Neeraj Shrivastava , Visvesvaraya A. Pentakota , Harshit Moondra , Abhinav Chandra
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Valerie M. Davis; Frank D. Cimino
- Main IPC: H03M1/10
- IPC: H03M1/10

Abstract:
A circuit includes a nonlinear analog-to-digital converter (ADC) configured to provide a first digital output based on an analog input signal. The circuit also includes a linearization circuit having a lookup table (LUT) memory configured to store initial calibration data. The linearization circuit is coupled to the nonlinear ADC and is configured to: determine updated calibration data based on the initial calibration data; replace the initial calibration data in the LUT memory with the updated calibration data; and provide a second digital output at a linearization circuit output of the linearization circuit based on the first digital output and the updated calibration data.
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