Invention Grant
- Patent Title: Integrated circuit structures having differentiated interconnect lines in a same dielectric layer
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Application No.: US16583691Application Date: 2019-09-26
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Publication No.: US12080643B2Publication Date: 2024-09-03
- Inventor: Travis W. Lajoie , Abhishek A. Sharma , Juan G. Alzate Vinasco , Chieh-Jen Ku , Shem O. Ogadhoh , Allen B. Gardiner , Blake C. Lin , Yih Wang , Pei-Hua Wang , Jack T. Kavalieros , Bernhard Sell , Tahir Ghani
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L23/528

Abstract:
Integrated circuit structures having differentiated interconnect lines in a same dielectric layer, and methods of fabricating integrated circuit structures having differentiated interconnect lines in a same dielectric layer, are described. In an example, an integrated circuit structure includes an inter-layer dielectric (ILD) layer above a substrate. A plurality of conductive interconnect lines is in the ILD layer. The plurality of conductive interconnect lines includes a first interconnect line having a first height, and a second interconnect line immediately laterally adjacent to but spaced apart from the first interconnect line, the second interconnect line having a second height less than the first height.
Public/Granted literature
- US20210098373A1 INTEGRATED CIRCUIT STRUCTURES HAVING DIFFERENTIATED INTERCONNECT LINES IN A SAME DIELECTRIC LAYER Public/Granted day:2021-04-01
Information query
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