Invention Grant
- Patent Title: Cell placement optimization
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Application No.: US17523033Application Date: 2021-11-10
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Publication No.: US12159904B2Publication Date: 2024-12-03
- Inventor: Chia-Chung Chen , Tsung-Hsin Yu , Chung-Hui Chen , Hui-Zhong Zhuang , Ya Yun Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L21/8234 ; H01L27/088 ; H01L29/08

Abstract:
The present disclosure describes structure with a substrate, a first well region, a second well region, and a third well region. The first well region is in the substrate. The second well region is in the first well region and includes a first source/drain (S/D) region. The third well region is in the substrate and adjacent to the first well region. The third well region includes a second S/D region, where a spacing between the first and second S/D regions is less than about 3 μm.
Public/Granted literature
- US20220367637A1 CELL PLACEMENT OPTIMIZATION Public/Granted day:2022-11-17
Information query
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