Invention Grant
- Patent Title: Concurrent multi-bit self-referenced read of programmable resistance memory cells in cross-point array
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Application No.: US17939826Application Date: 2022-09-07
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Publication No.: US12237010B2Publication Date: 2025-02-25
- Inventor: Nathan Franklin , Ward Parkinson , Michael Grobis , James O'Toole
- Applicant: SanDisk Technologies LLC
- Applicant Address: US TX Addison
- Assignee: SanDisk Technologies LLC
- Current Assignee: SanDisk Technologies LLC
- Current Assignee Address: US TX Addison
- Agency: Pearl Cohen Zedek Latzer Baratz, LLP
- Main IPC: G11C11/56
- IPC: G11C11/56 ; G11C11/16 ; H01L23/00 ; H01L25/065 ; H10B61/00 ; H10N50/80 ; H10N50/85

Abstract:
Concurrent access of multiple memory cells in a cross-point memory array is disclosed. In one aspect, a forced current approach is used in which, while a select voltage is applied to a selected bit line, an access current is driven separately through each selected word line to concurrently drive the access current separately through each selected memory cell. Hence, multiple memory cells are concurrently accessed. In some aspects, the memory cells are accessed using a self-referenced read (SRR), which improves read margin. Concurrently accessing more than one memory cell in a cross-point memory array improves bandwidth. Moreover, such concurrent accessing allows the memory system to be constructed with fewer, but larger cross-point arrays, which increases array efficiency. Moreover, concurrent access as disclosed herein is compatible with memory cells such as MRAM which require bipolar operation.
Public/Granted literature
- US20230005530A1 CONCURRENT MULTI-BIT ACCESS IN CROSS-POINT ARRAY Public/Granted day:2023-01-05
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