发明申请
- 专利标题： Semiconductor integrated circuit device, method of testing semiconductor integrated circuit device and method of manufacturing semiconductor integrated circuit device
- 专利标题（中）： 半导体集成电路器件，半导体集成电路器件的测试方法和半导体集成电路器件的制造方法
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申请号： US10918421申请日： 2004-08-16
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公开(公告)号： US20050018461A1公开(公告)日： 2005-01-27
- 发明人: Masatoshi Hasegawa , Shuichi Miyaoka , Hiroshi Akasaki , Masahiro Katayama
- 申请人： Masatoshi Hasegawa , Shuichi Miyaoka , Hiroshi Akasaki , Masahiro Katayama
- 专利权人： Hitachi, Ltd.,Hitachi ULSI Systems Co. Ltd.
- 当前专利权人： Hitachi, Ltd.,Hitachi ULSI Systems Co. Ltd.
- 优先权： JP2001-025227 20010201
- 主分类号： G01R31/28
- IPC分类号： G01R31/28 ; G01R31/3185 ; G11C11/401 ; G11C29/12 ; G11C29/14 ; G11C29/48 ; G11C29/50 ; G11C29/56 ; G11C19/08
摘要：
Inputs of a control circuit are connected to a terminal to which an external operation control signal is supplied and a terminal to which a timing signal used exclusively for testing is supplied, and the control circuit is made controllable such that, in a test mode, a state of an internal operation control signal is changed in response to a change of a state of the external operation control signal, and the internal operation control signal is changed in response to the timing exclusively used for testing, whereas, in a normal operation mode, the state of the internal operation control signal is changed in response to the change of the state of the external operation control signal, and the internal operation control signal is changed in response to the change of the external operation control signal.
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