Invention Application
- Patent Title: SEMICONDUCTOR STRUCTURES WITH COPLANAR RECESSED GATE LAYERS AND FABRICATION METHODS
- Patent Title (中): 具有共振阻挡栅层和制造方法的半导体结构
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Application No.: US14461887Application Date: 2014-08-18
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Publication No.: US20160049495A1Publication Date: 2016-02-18
- Inventor: Kristina TREVINO , Yuan-Hung LIU , Gabriel Padron WELLS , Xing ZHANG , Hoong Shing WONG , Chang Ho MAENG , Taejoon HAN , Gowri KAMARTHY , Isabelle ORAIN , Ganesh UPADHYAYA
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: US CA Fremont KY Grand Cayman
- Assignee: LAM RESEARCH CORPORATION,GLOBALFOUNDRIES INC.
- Current Assignee: LAM RESEARCH CORPORATION,GLOBALFOUNDRIES INC.
- Current Assignee Address: US CA Fremont KY Grand Cayman
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/40 ; H01L21/3213 ; H01L29/51 ; H01L29/49

Abstract:
Semiconductor structures and fabrication methods are provided which includes, for instance, providing a gate structure over a semiconductor substrate, the gate structure including multiple conformal gate layers and a gate material disposed within the multiple conformal gate layers; recessing a portion of the multiple conformal gate layers below an upper surface of the gate structure, where upper surfaces of recessed, multiple conformal gate layers are coplanar; and removing a portion of the gate material to facilitate an upper surface of a remaining portion of the gate material to be coplanar with an upper surface of the recessed, multiple conformal gate layers.
Public/Granted literature
- US09252238B1 Semiconductor structures with coplanar recessed gate layers and fabrication methods Public/Granted day:2016-02-02
Information query
IPC分类: