公开(公告)号：US20160049495A1

公开(公告)日：2016-02-18

申请号：US14461887

申请日：2014-08-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Kristina TREVINO ,  Yuan-Hung LIU ,  Gabriel Padron WELLS ,  Xing ZHANG ,  Hoong Shing WONG ,  Chang Ho MAENG ,  Taejoon HAN ,  Gowri KAMARTHY ,  Isabelle ORAIN ,  Ganesh UPADHYAYA

IPC: H01L29/66 ,  H01L29/40 ,  H01L21/3213 ,  H01L29/51 ,  H01L29/49

CPC classification number: H01L29/66545 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/32136 ,  H01L29/4966 ,  H01L29/517

Abstract: Semiconductor structures and fabrication methods are provided which includes, for instance, providing a gate structure over a semiconductor substrate, the gate structure including multiple conformal gate layers and a gate material disposed within the multiple conformal gate layers; recessing a portion of the multiple conformal gate layers below an upper surface of the gate structure, where upper surfaces of recessed, multiple conformal gate layers are coplanar; and removing a portion of the gate material to facilitate an upper surface of a remaining portion of the gate material to be coplanar with an upper surface of the recessed, multiple conformal gate layers.

Abstract translation: 提供半导体结构和制造方法，其包括例如在半导体衬底上提供栅极结构，所述栅极结构包括多个共形栅极层和设置在多个共形栅极层内的栅极材料; 将多个共形栅极层的一部分凹陷在栅极结构的上表面之下，其中凹入的多个共形栅极层的上表面是共面的; 以及去除所述栅极材料的一部分以便于所述栅极材料的剩余部分的上表面与所述凹入的多个共形栅极层的上表面共面。

公开(公告)号：US20160155800A1

公开(公告)日：2016-06-02

申请号：US14988050

申请日：2016-01-05

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hui ZANG ,  Guillaume BOUCHE ,  Gabriel Padron WELLS

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/161 ,  H01L21/308 ,  H01L29/16

CPC classification number: H01L29/0673 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31144 ,  H01L29/16 ,  H01L29/161 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

Abstract: Methods are presented for facilitating fabricating stacked nanowire, field-effect transistors. The methods include: forming a cut mask spacer on a gate structure disposed above multiple layers above a substrate structure, the gate structure including a sidewall spacer along its sidewalls, and the cut mask spacer overlying the sidewall spacer; defining a stack structure by cutting through the multiple layers using the cut mask spacer and gate structure as a mask, and selectively etching at least one layer of the multiple layers to undercut, in part, the mask, where at least one other layer of the multiple layers remains un-etched by the selectively etching; and providing an alignment mask spacer over the gate structure and over end surfaces of the multiple layers below the gate structure, the alignment mask spacer facilitating etching the other layer(s) of the multiple layers to selectively expose, in part, end surfaces of the other layer(s).

Abstract translation: 提出了用于促进制造堆叠的纳米线，场效应晶体管的方法。 所述方法包括：在栅极结构上形成切割掩模间隔物，栅极结构设置在衬底结构上方的多层上方，栅极结构包括沿其侧壁的侧壁间隔物和覆盖侧壁间隔物的切割掩模间隔物; 通过使用切割掩模间隔物和栅极结构作为掩模切割多个层来限定堆叠结构，并且部分地选择性地蚀刻多个层的至少一个层以部分地掩盖掩模，其中至少一个其它层 通过选择性蚀刻，多层保持未蚀刻; 并且在栅极结构的栅极结构和多个层的上端表面上提供对准掩模间隔物，所述对准掩模间隔物有助于蚀刻多个层的另一层，以选择性地暴露部分端部表面 其他层。