Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
- Patent Title (中): 半导体封装及其制造方法
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Application No.: US14821767Application Date: 2015-08-09
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Publication No.: US20160079208A1Publication Date: 2016-03-17
- Inventor: Junyeong HEO , CHAJEA JO , Taeje CHO
- Applicant: Junyeong HEO , CHAJEA JO , Taeje CHO
- Priority: KR10-2014-0120307 20140911
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/48 ; H01L23/00

Abstract:
An embodiment includes a semiconductor package comprising: a substrate; a first semiconductor chip mounted on the substrate; a second semiconductor chip mounted on a top surface of the first semiconductor chip; a connecting bump disposed between the first and second semiconductor chips to electrically connect the second semiconductor chip to the first semiconductor chip; and a first heat dissipation part disposed on the top surface of the first semiconductor chip between the first and second semiconductor chips and spaced apart from a bottom surface of the second semiconductor chip.
Public/Granted literature
- US09875992B2 Semiconductor package having stacked chips and a heat dissipation part and method of fabricating the same Public/Granted day:2018-01-23
Information query
IPC分类: