Invention Application
- Patent Title: METHOD OF FABRICATING MULTI-SUBSTRATE SEMICONDUCTOR DEVICES
- Patent Title (中): 制造多基片半导体器件的方法
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Application No.: US14940621Application Date: 2015-11-13
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Publication No.: US20160141282A1Publication Date: 2016-05-19
- Inventor: Joo-Hee Jang , Pil-Kyu Kang , Seok-Ho Kim , Tae-Yeong Kim , Hyo-Ju Kim , Byung-Lyul Park , Jum-Yong Park , Jin-Ho An , Kyu-Ha Lee , Yi-Koan Hong
- Applicant: Samsung Electronics Co., Ltd.
- Priority: KR10-2014-0157801 20141113
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L21/321

Abstract:
A first insulating layer is formed on a substrate. An opening is formed in the first insulating layer. A barrier layer is formed on the first insulating layer and conforming to sidewalls of the first insulating layer in the opening, and a conductive layer is formed on the barrier layer. Chemical mechanical polishing is performed to expose the first insulating layer and leave a barrier layer pattern in the opening and a conductive layer pattern on the barrier layer pattern in the opening, wherein a portion of the conductive layer pattern protrudes above an upper surface of the insulating layer and an upper surface of the barrier layer pattern. A second insulating layer is formed on the first insulating layer, the barrier layer pattern and the conductive layer pattern and planarized to expose the conductive layer pattern. A second substrate may be bonded to the exposed conductive layer pattern.
Public/Granted literature
- US09865581B2 Method of fabricating multi-substrate semiconductor devices Public/Granted day:2018-01-09
Information query
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