A semiconductor device includes a gate structure crossing an active pattern of a substrate. The semiconductor device may include a gate dielectric pattern between the substrate and the gate electrode. The gate structure includes a gate electrode, a capping pattern on the gate electrode, and one or more low-k dielectric layers at least partially covering one or more sidewalls of the capping pattern. The gate structure may include spacers at opposite sidewalk of the gate electrode and separate low-k dielectric layers between the capping pattern and the spacers. The capping pattern may have a width that is smaller than a width of the gate electrode. The capping pattern has a first dielectric constant, and the one or more low-k dielectric layers have a second dielectric constant. The second dielectric constant is smaller than the first dielectric constant. The second dielectric constant may he greater than or equal to 1.