A system and method are disclosed for performing address fault detection in a flash memory system. An address fault detection array is used to confirm that an activated word line or bit line is the word line or bit line that was actually intended to be activated based upon the received address, which will identify a type of fault where the wrong word line or bit line is activated. The address fault detection array also is used to indicate whether more than one word line or bit line was activated, which will identify a type of fault where two or more word lines or bit lines are activated.