- 专利标题: MOLDED SEMICONDUCTOR PACKAGE AND RELATED METHODS
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申请号: US15679666申请日: 2017-08-17
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公开(公告)号: US20190057947A1公开(公告)日: 2019-02-21
- 发明人: Sw WANG , CH CHEW , Eiji KUROSE , How Kiat LIEW
- 申请人: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- 申请人地址: US AZ Phoenix
- 专利权人: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- 当前专利权人: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- 当前专利权人地址: US AZ Phoenix
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L23/31
摘要:
Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side; one or more bumps included on the first side of the wafer, the bumps comprising a first layer having a first metal and a second layer including a second metal. The first layer may have a first thickness and the second layer may have a second thickness. The semiconductor package may also have a mold compound encapsulating all the semiconductor die except for a face of the one or more bumps.
公开/授权文献
- US11244918B2 Molded semiconductor package and related methods 公开/授权日:2022-02-08
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