Invention Application
- Patent Title: DEVICE, SYSTEM AND METHOD FOR DETERMINING BIT RELIABILITY INFORMATION
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Application No.: US16398003Application Date: 2019-04-29
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Publication No.: US20190260394A1Publication Date: 2019-08-22
- Inventor: Ravi Motwani , Poovaiah Palangappa , Santhosh Vanaparthy
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H03M13/15
- IPC: H03M13/15 ; H03M13/37 ; H03M13/39 ; H03M13/00 ; G06F11/07 ; G06F11/10

Abstract:
Techniques and mechanisms for determining information which is to be used for performing bit error correction. In an embodiment, bit reliability information is calculated based on a first likelihood function, and also on data signals which each indicate a respective bit of a codeword. Values of the bit reliability information each indicate, for a respective bit of the codeword, a confidence that the bit is at a particular logic state. A syndrome vector is calculated based on the bit reliability information, and one of the first likelihood function or a second likelihood function is selected based on one or more bit errors which are indicated by the syndrome vector. The selected one of the first likelihood function or the second likelihood function is used to correct bit errors of the codeword. In another embodiment, the first likelihood function is a default likelihood function to be used for initial syndrome vector calculations.
Public/Granted literature
- US10944428B2 Device, system and method for determining bit reliability information Public/Granted day:2021-03-09
Information query
IPC分类: