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公开(公告)号:US11265016B2
公开(公告)日:2022-03-01
申请号:US16920808
申请日:2020-07-06
Applicant: Intel Corporation
Inventor: Poovaiah Palangappa
Abstract: Examples relate to a decoding apparatus, a decoding device, a decoding method, a decoding computer program, and a communication device, a memory device and a storage device comprising such a decoding apparatus or decoding method. A decoding apparatus for performing iterative decoding on a codeword comprises processing circuitry comprising a plurality of processing units, and control circuitry configured to control the iterative decoding of the codeword. The iterative decoding is based on a parity-check matrix. The matrix is sub-divided into two or more partitions. The control circuitry is configured to operate in a first mode of operation to process a codeword having a first length, and to operate in a second mode of operation to process a codeword having a second length. The control circuitry is configured to multiplex the utilization of the plurality of processing units across the two or more partitions of the matrix at least in the second mode of operation.
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公开(公告)号:US20190260394A1
公开(公告)日:2019-08-22
申请号:US16398003
申请日:2019-04-29
Applicant: Intel Corporation
Inventor: Ravi Motwani , Poovaiah Palangappa , Santhosh Vanaparthy
Abstract: Techniques and mechanisms for determining information which is to be used for performing bit error correction. In an embodiment, bit reliability information is calculated based on a first likelihood function, and also on data signals which each indicate a respective bit of a codeword. Values of the bit reliability information each indicate, for a respective bit of the codeword, a confidence that the bit is at a particular logic state. A syndrome vector is calculated based on the bit reliability information, and one of the first likelihood function or a second likelihood function is selected based on one or more bit errors which are indicated by the syndrome vector. The selected one of the first likelihood function or the second likelihood function is used to correct bit errors of the codeword. In another embodiment, the first likelihood function is a default likelihood function to be used for initial syndrome vector calculations.
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公开(公告)号:US11777530B2
公开(公告)日:2023-10-03
申请号:US17754152
申请日:2020-11-05
Applicant: Intel Corporation
Inventor: Ravi Motwani , Poovaiah Palangappa , Santosh Emmadi , Santhosh K. Vanaparthy , Aman Bhatia
CPC classification number: H03M13/353 , H03M13/036 , H03M13/612 , H03M13/1162 , H03M13/2948
Abstract: Methods and apparatuses for generating optimized LDPC codes are proposed. One of the methods is a method for generating an optimized LDPC code for an asymmetric transmis¬ sion channel. The method includes receiving an initial LDPC code for the asymmetric transmission channel. Further, the method includes performing a density evolution threshold optimization for the initial LDPC code in order to obtain the optimized LDPC code for the asymmetric transmission channel. A uniformly mixed symmetric channel density for the asymmetric transmission channel is used in the density evolution threshold optimization.
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公开(公告)号:US10944428B2
公开(公告)日:2021-03-09
申请号:US16398003
申请日:2019-04-29
Applicant: Intel Corporation
Inventor: Ravi Motwani , Poovaiah Palangappa , Santhosh Vanaparthy
Abstract: Techniques and mechanisms for determining information which is to be used for performing bit error correction. In an embodiment, bit reliability information is calculated based on a first likelihood function, and also on data signals which each indicate a respective bit of a codeword. Values of the bit reliability information each indicate, for a respective bit of the codeword, a confidence that the bit is at a particular logic state. A syndrome vector is calculated based on the bit reliability information, and one of the first likelihood function or a second likelihood function is selected based on one or more bit errors which are indicated by the syndrome vector. The selected one of the first likelihood function or the second likelihood function is used to correct bit errors of the codeword. In another embodiment, the first likelihood function is a default likelihood function to be used for initial syndrome vector calculations.
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