- 专利标题： Methods of Forming Metal Gates
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申请号： US15966299申请日： 2018-04-30
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公开(公告)号： US20190333826A1公开(公告)日： 2019-10-31
- 发明人: Ju-Li Huang , Hsin-Che Chiang , Ju-Yuan Tzeng , Wei-Ze Xu , Yueh-Yi Chen , Shu-Hui Wang , Shih-Hsun Chang
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 主分类号： H01L21/8238
- IPC分类号： H01L21/8238 ; H01L27/092 ; H01L29/49 ; H01L29/51 ; H01L29/66 ; H01L21/02 ; H01L21/28 ; H01L21/311
摘要：
A method includes removing a dummy gate structure formed over a first fin and a second fin, forming an interfacial layer in the first trench and the second trench, forming a first high-k dielectric layer over the interfacial layer in the first trench and the second trench, removing the first high-k dielectric layer in the second trench, forming a self-assembled monolayer over the first high-k dielectric layer in the first trench, forming a second high-k dielectric layer over the self-assembled monolayer in the first trench and over the interfacial layer in the second trench, forming a work function metal layer in the first and the second trenches, and forming a bulk conductive layer over the work function metal layer in the first and the second trenches. In some embodiments, the first high-k dielectric layer includes lanthanum and oxygen.
公开/授权文献
- US10529629B2 Methods of forming metal gates 公开/授权日：2020-01-07
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