- 专利标题： THERMALLY ENHANCED SILICON BACK END LAYERS FOR IMPROVED THERMAL PERFORMANCE
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申请号： US16898196申请日： 2020-06-10
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公开(公告)号： US20210391244A1公开(公告)日： 2021-12-16
- 发明人: Chandra Mohan JHA , Pooya TADAYON , Aastha UPPAL , Weihua TANG , Paul DIGLIO , Xavier BRUN
- 申请人： Intel Corporation
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： H01L23/498
- IPC分类号： H01L23/498 ; H01L23/373 ; H01L23/522 ; H01L21/56 ; H01L21/78
摘要：
Embodiments disclosed herein comprise a die and methods of forming a die. In an embodiment, a die comprises, a die substrate, wherein the die substrate has a first thermal conductivity, and a first layer over the die substrate, wherein the first layer has a second thermal conductivity that is greater than the first thermal conductivity. In an embodiment, the die further comprises a second layer over the first layer, wherein the second layer comprises transistors.
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