Invention Application
- Patent Title: THREE-DIMENSIONAL MEMORY ARRAY INCLUDING DUAL WORK FUNCTION FLOATING GATES AND METHOD OF MAKING THE SAME
-
Application No.: US17351720Application Date: 2021-06-18
-
Publication No.: US20220254798A1Publication Date: 2022-08-11
- Inventor: Ramy Nashed Bassely SAID , Yanli ZHANG , Jiahui YUAN , Raghuveer S. MAKALA , Senaka KANAKAMEDALA
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX ADDISON
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX ADDISON
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L29/49

Abstract:
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, memory opening fill structures extending through the alternating stack, where each of the memory opening fill structures includes a vertical semiconductor channel, a tunneling dielectric layer, and a vertical stack of memory elements located at levels of the electrically conductive layers between a respective vertically neighboring pair of the insulating layers. Each of the memory elements is located at a level of a respective one of the electrically conductive layers between the respective vertically neighboring pair of the insulating layers. Each of the memory elements includes a first memory material portion, and a second memory material portion that is vertically spaced from the first memory material portion. The second memory material portion has a different material composition from the first memory material portion.
Public/Granted literature
- US11631686B2 Three-dimensional memory array including dual work function floating gates and method of making the same Public/Granted day:2023-04-18
Information query
IPC分类: