- 专利标题: HIGH VOLTAGE SEMICONDUCTOR PACKAGE WITH PIN FIT LEADS
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申请号: US17234964申请日: 2021-04-20
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公开(公告)号: US20220336401A1公开(公告)日: 2022-10-20
- 发明人: Edmund Sales Cabatbat , Thai Kee Gan , Kean Ming Koe , Ke Yan Tean
- 申请人: Infineon Technologies AG
- 申请人地址: DE Neubiberg
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Neubiberg
- 主分类号: H01L23/00
- IPC分类号: H01L23/00 ; H01L25/065 ; H01L23/31 ; H01L23/495 ; H01L23/14 ; H01L23/13
摘要:
A semiconductor package includes a die pad, a semiconductor die mounted on the die pad and comprising a first terminal facing away from the die pad and a second terminal facing and electrically connected to the die pad, an interconnect clip electrically connected to the first terminal, an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interconnect clip, and a first opening in the encapsulant body that exposes a surface of the interconnect clip, the encapsulant body comprises a lower surface, an upper surface opposite from the lower surface, and a first outer edge side extending between the lower surface and the upper surface, and the first opening is laterally offset from the first outer edge side.
公开/授权文献
- US11652078B2 High voltage semiconductor package with pin fit leads 公开/授权日:2023-05-16
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