-
公开(公告)号:US20220336401A1
公开(公告)日:2022-10-20
申请号:US17234964
申请日:2021-04-20
Applicant: Infineon Technologies AG
Inventor: Edmund Sales Cabatbat , Thai Kee Gan , Kean Ming Koe , Ke Yan Tean
IPC: H01L23/00 , H01L25/065 , H01L23/31 , H01L23/495 , H01L23/14 , H01L23/13
Abstract: A semiconductor package includes a die pad, a semiconductor die mounted on the die pad and comprising a first terminal facing away from the die pad and a second terminal facing and electrically connected to the die pad, an interconnect clip electrically connected to the first terminal, an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interconnect clip, and a first opening in the encapsulant body that exposes a surface of the interconnect clip, the encapsulant body comprises a lower surface, an upper surface opposite from the lower surface, and a first outer edge side extending between the lower surface and the upper surface, and the first opening is laterally offset from the first outer edge side.
-
公开(公告)号:US20220262693A1
公开(公告)日:2022-08-18
申请号:US17177703
申请日:2021-02-17
Applicant: Infineon Technologies AG
Inventor: Oliver Markus Kreiter , Ludwig Busch , Angel Enverga , Mei Fen Hiew , Tian See Hoe , Elvis Keli , Kean Ming Koe , Sanjay Kumar Murugan , Michael Niendorf , Ivan Nikitin , Bernhard Stiller , Thomas Stoek , Ke Yan Tean
IPC: H01L23/31 , H01L23/495 , H01L21/48 , H01L21/56
Abstract: A semiconductor module includes: a dual-gauge leadframe having thicker and thinner parts, part of the thinner part forming a high voltage lead; a semiconductor die attached to the thicker part; and a molding compound (MC) encapsulating the die. The thicker leadframe part is disposed at a bottom side of the MC. A side face of the MC has a stepped region between the high voltage lead and thicker leadframe part. A first generally vertical part of the stepped region extends from the high voltage lead to the generally horizontal part, a generally horizontal part of the stepped region extends to the second generally vertical part, and a second generally vertical part of the stepped region extends to the bottom side of the MC. A linear dimension of the generally horizontal part as measured from the first generally vertical part to the second generally vertical part is at least 4.5 mm.
-
3.
公开(公告)号:US20240087992A1
公开(公告)日:2024-03-14
申请号:US18453475
申请日:2023-08-22
Applicant: Infineon Technologies AG
Inventor: Ke Yan Tean , Edmund Sales Cabatbat , Kean Ming Koe
IPC: H01L23/495 , H01L25/00 , H01L25/065
CPC classification number: H01L23/49524 , H01L23/49555 , H01L23/49575 , H01L25/0657 , H01L25/50 , H01L2225/06589
Abstract: A chip package is provided. The chip package includes a first chip, a second chip, an electrically conductive structure to which the first chip and the second chip are mounted, at least one contact terminal for electrically contacting the first chip and/or the second chip, and encapsulation material at least partially encapsulating the first chip, the second chip, and the electrically conductive structure. The encapsulation material forms a chip package body from which the at least one contact terminal protrudes. At least a portion of the electrically conductive structure forms a portion of an outer surface of the chip package body.
-
公开(公告)号:US11652078B2
公开(公告)日:2023-05-16
申请号:US17234964
申请日:2021-04-20
Applicant: Infineon Technologies AG
Inventor: Edmund Sales Cabatbat , Thai Kee Gan , Kean Ming Koe , Ke Yan Tean
IPC: H01L23/00 , H01L25/065 , H01L23/31 , H01L23/495 , H01L23/14 , H01L23/13
CPC classification number: H01L24/40 , H01L23/13 , H01L23/14 , H01L23/3157 , H01L23/49548 , H01L24/37 , H01L25/0655 , H01L2224/37005 , H01L2224/37012 , H01L2224/4023 , H01L2924/182 , H01L2924/1815 , H01L2924/381
Abstract: A semiconductor package includes a die pad, a semiconductor die mounted on the die pad and comprising a first terminal facing away from the die pad and a second terminal facing and electrically connected to the die pad, an interconnect clip electrically connected to the first terminal, an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interconnect clip, and a first opening in the encapsulant body that exposes a surface of the interconnect clip, the encapsulant body comprises a lower surface, an upper surface opposite from the lower surface, and a first outer edge side extending between the lower surface and the upper surface, and the first opening is laterally offset from the first outer edge side.
-
公开(公告)号:US11621204B2
公开(公告)日:2023-04-04
申请号:US17177703
申请日:2021-02-17
Applicant: Infineon Technologies AG
Inventor: Oliver Markus Kreiter , Ludwig Busch , Angel Enverga , Mei Fen Hiew , Tian See Hoe , Elvis Keli , Kean Ming Koe , Sanjay Kumar Murugan , Michael Niendorf , Ivan Nikitin , Bernhard Stiller , Thomas Stoek , Ke Yan Tean
IPC: H01L23/495 , H01L23/31 , H01L21/56 , H01L21/48
Abstract: A semiconductor module includes: a dual-gauge leadframe having thicker and thinner parts, part of the thinner part forming a high voltage lead; a semiconductor die attached to the thicker part; and a molding compound (MC) encapsulating the die. The thicker leadframe part is disposed at a bottom side of the MC. A side face of the MC has a stepped region between the high voltage lead and thicker leadframe part. A first generally vertical part of the stepped region extends from the high voltage lead to the generally horizontal part, a generally horizontal part of the stepped region extends to the second generally vertical part, and a second generally vertical part of the stepped region extends to the bottom side of the MC. A linear dimension of the generally horizontal part as measured from the first generally vertical part to the second generally vertical part is at least 4.5 mm.
-
-
-
-