公开(公告)号：US20240387305A1

公开(公告)日：2024-11-21

申请号：US18647712

申请日：2024-04-26

Applicant: Infineon Technologies AG

Inventor： Meng How Chong ,  Muhammad Safie Rosli ,  Michael Reyes Godoy ,  Ke Yan Tean

IPC: H01L23/29 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/495

Abstract: A semiconductor package includes: a die pad having opposing first and second sides and lateral sides connecting the first and second sides; at least one semiconductor die arranged over the first side; an encapsulation including a first dielectric material and encapsulating the semiconductor die, the second side of the die pad being at least partially exposed from the encapsulation; and a contiguous isolation structure including a second dielectric material different from the first dielectric material and covering the second side of the die pad. The encapsulation includes at least one first trench arranged along at least a part of a contour of the second side of the die pad. The second side of the die pad includes at least one second trench arranged along at least a part of the contour of the second side of the die pad. The trenches are filled by the contiguous isolation structure.

公开(公告)号：US20220139811A1

公开(公告)日：2022-05-05

申请号：US17086976

申请日：2020-11-02

Applicant: Infineon Technologies AG

Inventor： Azlina Kassim ,  Thai Kee Gan ,  Mark Pavier ,  Ke Yan Tean ,  Mohd Hasrul Zulkifli

IPC: H01L23/495 ,  H01L23/31

Abstract: An interconnect clip includes a die attach pad that comp includes rises a die attach surface at an inner side of the interconnect clip, a heat dissipation pad that includes a heat dissipation surface at an outer side of the interconnect clip, and a lead contact pad that includes a lead contact surface at an inner side of the interconnect clip or at an outer side of the interconnect clip. The outer side of the interconnect clip in the lead contact pad faces and is spaced apart from the inner side of the interconnect clip in the heat dissipation pad, and the inner side of the interconnect clip in the lead contact pad faces and is spaced apart from the outer side of the interconnect clip in the die attach pad.

公开(公告)号：US12094793B2

公开(公告)日：2024-09-17

申请号：US18380276

申请日：2023-10-16

Applicant: Infineon Technologies AG

Inventor： Edward Fuergut ,  Chii Shang Hong ,  Teck Sim Lee ,  Bernd Schmoelzer ,  Ke Yan Tean ,  Lee Shuang Wang

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/495 ,  H01L23/498

CPC classification number: H01L23/3121 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49506 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49551 ,  H01L23/49555 ,  H01L23/49568 ,  H01L23/49838 ,  H01L24/46 ,  H01L24/49 ,  H01L24/83 ,  H01L23/49503 ,  H01L23/49575 ,  H01L2924/181

Abstract: A package is disclosed. In one example, the package includes a first main face for mounting a heat sink and an opposing second main face for being mounted on a mounting base. The package comprises a carrier, an electronic component mounted at the carrier, and an encapsulant encapsulating at least part of the electronic component and at least part of the carrier. Electrically insulating material covers electrically conductive material of the carrier at said first main face. The encapsulant comprises at least one step at the first main face.

公开(公告)号：US12057376B2

公开(公告)日：2024-08-06

申请号：US17086976

申请日：2020-11-02

Applicant: Infineon Technologies AG

Inventor： Azlina Kassim ,  Thai Kee Gan ,  Mark Pavier ,  Ke Yan Tean ,  Mohd Hasrul Zulkifli

IPC: H01L23/495 ,  H01L23/31

CPC classification number: H01L23/49503 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49524 ,  H01L23/49568

Abstract: An interconnect clip includes a die attach pad that comp includes rises a die attach surface at an inner side of the interconnect clip, a heat dissipation pad that includes a heat dissipation surface at an outer side of the interconnect clip, and a lead contact pad that includes a lead contact surface at an inner side of the interconnect clip or at an outer side of the interconnect clip. The outer side of the interconnect clip in the lead contact pad faces and is spaced apart from the inner side of the interconnect clip in the heat dissipation pad, and the inner side of the interconnect clip in the lead contact pad faces and is spaced apart from the outer side of the interconnect clip in the die attach pad.

公开(公告)号：US20210043549A1

公开(公告)日：2021-02-11

申请号：US16535632

申请日：2019-08-08

Applicant: Infineon Technologies AG

Inventor： Ke Yan Tean ,  Mei Fen Hiew ,  Jia Yi Wong

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

Abstract: A clip for a semiconductor package includes a first portion and a second portion. The first portion includes a first surface, a second surface opposite to the first surface and configured to contact a first electrically conductive component, and a stepped region between the first surface and the second surface such that the second surface has a smaller area than the first surface. The second portion is coupled to the first portion and configured to contact a second electrically conductive component. The second portion includes a third surface aligned with the first surface.

公开(公告)号：US20210013171A1

公开(公告)日：2021-01-14

申请号：US16507003

申请日：2019-07-09

Applicant: Infineon Technologies AG

Inventor： Mohd Kahar Bajuri ,  Abdul Rahman Mohamed ,  Siang Kuan Chua ,  Ke Yan Tean

IPC: H01L23/00

Abstract: A clip for a semiconductor package and a semiconductor having a clip is disclosed. In one example, the clip includes a first planar portion, a plurality of first pillars, and a plurality of first solder balls. Each first pillar of the plurality of first pillars is coupled to the first planar portion. Each first solder ball of the plurality of first solder balls is coupled to a corresponding first pillar of the plurality of first pillars.

公开(公告)号：US20220336401A1

公开(公告)日：2022-10-20

申请号：US17234964

申请日：2021-04-20

Applicant: Infineon Technologies AG

Inventor： Edmund Sales Cabatbat ,  Thai Kee Gan ,  Kean Ming Koe ,  Ke Yan Tean

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/495 ,  H01L23/14 ,  H01L23/13

Abstract: A semiconductor package includes a die pad, a semiconductor die mounted on the die pad and comprising a first terminal facing away from the die pad and a second terminal facing and electrically connected to the die pad, an interconnect clip electrically connected to the first terminal, an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interconnect clip, and a first opening in the encapsulant body that exposes a surface of the interconnect clip, the encapsulant body comprises a lower surface, an upper surface opposite from the lower surface, and a first outer edge side extending between the lower surface and the upper surface, and the first opening is laterally offset from the first outer edge side.

公开(公告)号：US20220262693A1

公开(公告)日：2022-08-18

申请号：US17177703

申请日：2021-02-17

Applicant: Infineon Technologies AG

Inventor： Oliver Markus Kreiter ,  Ludwig Busch ,  Angel Enverga ,  Mei Fen Hiew ,  Tian See Hoe ,  Elvis Keli ,  Kean Ming Koe ,  Sanjay Kumar Murugan ,  Michael Niendorf ,  Ivan Nikitin ,  Bernhard Stiller ,  Thomas Stoek ,  Ke Yan Tean

IPC: H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor module includes: a dual-gauge leadframe having thicker and thinner parts, part of the thinner part forming a high voltage lead; a semiconductor die attached to the thicker part; and a molding compound (MC) encapsulating the die. The thicker leadframe part is disposed at a bottom side of the MC. A side face of the MC has a stepped region between the high voltage lead and thicker leadframe part. A first generally vertical part of the stepped region extends from the high voltage lead to the generally horizontal part, a generally horizontal part of the stepped region extends to the second generally vertical part, and a second generally vertical part of the stepped region extends to the bottom side of the MC. A linear dimension of the generally horizontal part as measured from the first generally vertical part to the second generally vertical part is at least 4.5 mm.

公开(公告)号：US11211353B2

公开(公告)日：2021-12-28

申请号：US16507003

申请日：2019-07-09

Applicant: Infineon Technologies AG

Inventor： Mohd Kahar Bajuri ,  Abdul Rahman Mohamed ,  Siang Kuan Chua ,  Ke Yan Tean

IPC: H01L23/00

Abstract: A clip for a semiconductor package and a semiconductor having a clip is disclosed. In one example, the clip includes a first planar portion, a plurality of first pillars, and a plurality of first solder balls. Each first pillar of the plurality of first pillars is coupled to the first planar portion. Each first solder ball of the plurality of first solder balls is coupled to a corresponding first pillar of the plurality of first pillars.

公开(公告)号：US11069600B2

公开(公告)日：2021-07-20

申请号：US16422163

申请日：2019-05-24

Applicant: Infineon Technologies AG

Inventor： Ke Yan Tean ,  Thomas Bemmerl ,  Thai Kee Gan ,  Azlina Kassim

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor package includes a die pad having a die attach surface, a rear surface opposite the die attach surface, and an outer edge side extending between the die attach surface and the rear surface, the outer edge side having a step-shaped profile, wherein an upper section of the die pad laterally overhangs past a lower section of the die pad, a semiconductor die mounted on the die attach surface and having a first electrical terminal on an upper surface of the semiconductor die, and a first conductive clip that directly electrically contacts the first electrical terminal and wraps around the outer edge side of the die pad such that a section of the first conductive clip is at least partially within an area that is directly below the upper section of the die pad and directly laterally adjacent to the lower section.