Invention Application
- Patent Title: METHOD OF FABRICATING A MULTI-GATE DEVICE
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Application No.: US17812997Application Date: 2022-07-15
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Publication No.: US20220359754A1Publication Date: 2022-11-10
- Inventor: Huan-Sheng WEI , Hung-Li CHIANG , Chia-Wen LIU , Yi-Ming SHEU , Zhiqiang WU , Chung-Cheng WU , Ying-Keung LEUNG
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/786 ; H01L21/02 ; H01L21/306 ; H01L21/311 ; H01L29/06 ; H01L29/08 ; H01L29/165 ; H01L29/423 ; H01L29/66
Abstract:
A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.
Public/Granted literature
- US11955554B2 Method of fabricating a multi-gate device Public/Granted day:2024-04-09
Information query
IPC分类:
