Invention Application
- Patent Title: SYSTEM DESIGN FOR LOW TEMPERATURE MEMORY
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Application No.: US17943044Application Date: 2022-09-12
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Publication No.: US20230005526A1Publication Date: 2023-01-05
- Inventor: Sagar SUTHRAM , Abhishek SHARMA , Wilfred GOMES , Pushkar RANADE , Kuljit S. BAINS , Tahir GHANI , Anand MURTHY
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G11C11/406
- IPC: G11C11/406 ; H01L25/065 ; H01L25/18

Abstract:
A system can be designed with memory to operate in a low temperature environment. The low temperature memory can be customized for low temperature operation, having a gate stack to adjust a work function of the memory cell transistors to reduce the threshold voltage (Vth) relative to a standard memory device. The reduced temperature can improve the conductivity of other components within the memory, enabling increased memory array sizes, fewer vertical ground channels for stacked devices, and reduced operating power. Based on the differences in the memory, the memory controller can manage access to the memory device with adjusted control parameters based on lower leakage voltage for the memory cells and lower line resistance for the memory array.
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