Invention Application
- Patent Title: BONDED ASSEMBLY INCLUDING AN AIRGAP CONTAINING BONDING-LEVEL DIELECTRIC LAYER AND METHODS OF FORMING THE SAME
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Application No.: US17370317Application Date: 2021-07-08
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Publication No.: US20230008286A1Publication Date: 2023-01-12
- Inventor: Lin HOU , Peter RABKIN , Adarsh RAJASHEKHAR , Raghuveer S. MAKALA , Masaaki HIGASHITANI
- Applicant: SANDISK TECHNOLOGIES LLC
- Applicant Address: US TX Addison
- Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee: SANDISK TECHNOLOGIES LLC
- Current Assignee Address: US TX Addison
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A bonded assembly includes a first semiconductor die containing a first substrate, first semiconductor devices, and first bonding pads laterally surrounded by a first pad-level dielectric layer. The first pad-level dielectric layer includes at least one first encapsulated airgap located between neighboring pairs of first bonding pads and encapsulated by a first dielectric fill material of the first pad-level dielectric layer. The bonded assembly includes a second semiconductor die containing a second substrate, second semiconductor devices, and second bonding pads laterally surrounded by a second pad-level dielectric layer. Each of the second bonding pads is bonded to a respective one of the first bonding pads.
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