Invention Publication
- Patent Title: FETS and Methods of Forming FETS
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Application No.: US18342855Application Date: 2023-06-28
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Publication No.: US20230343635A1Publication Date: 2023-10-26
- Inventor: Yen-Ru Lee , Chii-Horng Li , Chien-I Kuo , Li-Li Su , Chien-Chang Su , Heng-Wen Ting , Jung-Chi Tai , Che-Hui Lee , Ying-Wei Li
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- The original application number of the division: US15002077 2016.01.20
- Main IPC: H01L21/764
- IPC: H01L21/764 ; H01L29/06 ; H01L29/08 ; H01L29/16 ; H01L29/24 ; H01L29/161 ; H01L29/165 ; H01L29/78 ; H01L29/66

Abstract:
An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
Public/Granted literature
- US12094761B2 FETs and methods of forming FETs Public/Granted day:2024-09-17
Information query
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