A method of semiconductor manufacture comprising forming a plurality of first mandrels as the top layer of the multi-layered hard mask and forming a first spacer around each of the plurality of first mandrels. Removing the plurality of first mandrels and cutting the first spacer to form a plurality of second mandrels. Forming a second spacer around each of the plurality of second mandrels and forming a first self-aligned pattern that includes a plurality of third mandrels. Removing the plurality of second mandrels and the second spacer and etching the multi-layered hard mask to transfer the first-self aligned pattern to a lower layer of the multi-layered hard mask. Forming a second self-aligned pattern, wherein the second self-aligned pattern is intermixed with the first self-aligned pattern and etching the first self-aligned pattern and the second self-aligned pattern into the conductive metal layer.