Invention Publication
- Patent Title: DYNAMIC PRECISION FOR NEURAL NETWORK COMPUTE OPERATIONS
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Application No.: US18351124Application Date: 2023-07-12
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Publication No.: US20240005136A1Publication Date: 2024-01-04
- Inventor: Kamal Sinha , Balaji Vembu , Eriko Nurvitadhi , Nicolas C. Galoppo Von Borries , Rajkishore Barik , Tsung-Han Lin , Joydeep Ray , Ping T. Tang , Michael S. Strickland , Xiaoming Chen , Anbang Yao , Tatiana Shpeisman , Abhishek R. Appu , Altug Koker , Farshad Akhbari , Narayan Srinivasa , Feng Chen , Dukhwan Kim , Nadathur Rajagopalan Satish , John C. Weast , Mike B. MacPherson , Linda L. Hurd , Vasanth Ranganathan , Sanjeev Jahagirdar
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06N3/063
- IPC: G06N3/063 ; G06N3/08 ; G06N3/04 ; G06T1/20 ; G06F9/30 ; G06T15/00 ; G06F15/78 ; G06F15/76 ; G06F1/3287 ; G06F1/3293 ; G06N3/084 ; G06N3/044 ; G06N3/045
Abstract:
In an example, an apparatus comprises a compute engine comprising a high precision component and a low precision component; and logic, at least partially including hardware logic, to receive instructions in the compute engine; select at least one of the high precision component or the low precision component to execute the instructions; and apply a gate to at least one of the high precision component or the low precision component to execute the instructions. Other embodiments are also disclosed and claimed.
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