An embodiment of the present inventive step provides a semiconductor device, comprising: first and second fin-type active patterns disposed on an upper surface of a substrate, and having different widths; first and second gate structures crossing the first and second fin-type active patterns, respectively; first and second source/drain regions disposed on the first and second fin-type active patterns, respectively; first and second contact structures connected to the first and second source/drain regions, respectively; a gate isolation structure adjacent to the first fin-type active pattern having a relatively large width; a buried conductive structure contacting one end surface of the gate isolation structure, and connected to the second contact structure; a conductive through-structure extending from a lower surface of the substrate, and connected to the buried conductive structure; and a first wiring layer electrically connected to the first contact structure and the buried conductive structure.