Invention Publication
- Patent Title: BACKSIDE CONTACTED SUB-FIN DIODES
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Application No.: US17992057Application Date: 2022-11-22
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Publication No.: US20240170581A1Publication Date: 2024-05-23
- Inventor: Cheng-Ying Huang , Ayan Kar , Patrick Morrow , Charles C. Kuo , Nicholas A. Thomson , Benjamin Orr , Kalyan C. Kolluru , Marko Radosavljevic , Jack T. Kavalieros
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H01L29/861
- IPC: H01L29/861 ; H01L27/02 ; H01L27/06 ; H01L29/06

Abstract:
An integrated circuit structure includes a sub-fin having at least a first portion that is doped with a first type of dopant, and a second portion that is doped with a second type of dopant. A PN junction is between the first and second portions of the sub-fin. The first type of dopant is one of a p-type or an n-type dopant, and the second type of dopant is the other of the p-type or the n-type dopant. A first contact and a second contact comprise conductive material. In an example, the first contact and the second contact are respectively in contact with the first portion and the second portion of the sub-fin. A diode is formed based on the PN junction between the first and second portions, where the first contact is an anode contact of the diode, and the second contact is a cathode contact of the diode.
Information query
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