Invention Publication
- Patent Title: SEMICONDUCTOR DEVICE INCLUDING MULTI-LAYER GATE INSULATING LAYER AND ELECTRONIC DEVICE INCLUDING THE SAME
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Application No.: US18518729Application Date: 2023-11-24
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Publication No.: US20240178307A1Publication Date: 2024-05-30
- Inventor: Minsu SEOL , Sungil PARK , Jaehyun PARK , Kyung-Eun BYUN , Eunkyu LEE , Junyoung KWON , Minseok YOO
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si
- Priority: KR 20220160792 2022.11.25
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/24 ; H01L29/78

Abstract:
A semiconductor device may include a multi-layer gate dielectric layer and an electronic apparatus including the semiconductor device. The semiconductor device may include a channel layer including a two-dimensional semiconductor material, a gate dielectric layer on a first area of the channel layer, a gate electrode on the gate dielectric layer, and source and drain electrodes in a second area of the channel layer. The gate dielectric layer may include a high-k dielectric layer and an intermediate dielectric layer. The intermediate dielectric layer may be between the high-k dielectric layer and the channel layer. A dielectric constant of the intermediate dielectric layer may be less than a dielectric constant of the high-k dielectric layer.
Information query
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