公开(公告)号：US20240297221A1

公开(公告)日：2024-09-05

申请号：US18405389

申请日：2024-01-05

Applicant: Samsung Electronics Co., Ltd. ,  University-Industry Cooperation Group Of Kyung Hee University

Inventor： Changseok LEE ,  Seunghyun LEE ,  Minsu SEOL ,  Dohee KIM ,  Junseong BAE ,  Hyeyoon RYU ,  Sangwon KIM ,  Kyung-Eun BYUN

IPC: H01L29/16 ,  H01L29/167 ,  H01L29/417 ,  H01L29/778

CPC classification number: H01L29/1606 ,  H01L29/167 ,  H01L29/41725 ,  H01L29/778

Abstract: A transistor structure may include a semiconductor structure may include a substrate; a source electrode and a drain electrode spaced apart from each other on the substrate; a channel layer connected to the source electrode and the drain electrode; a gate insulating layer on the channel layer; and a gate electrode on the gate insulating layer. The channel layer may include a two-dimensional semiconductor material. The source electrode and the drain electrode each may include a graphene layer and a metal layer. The graphene layer may be formed by as-growing on the substrate. The graphene layer and the metal layer may be side by side in a vertical direction with respect to a surface of the substrate.

公开(公告)号：US20240222432A1

公开(公告)日：2024-07-04

申请号：US18401855

申请日：2024-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joungeun YOO ,  Duseop YOON ,  Kyung-Eun BYUN ,  Minsu SEOL

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/786

CPC classification number: H01L29/0673 ,  H01L29/41725 ,  H01L29/78696

Abstract: A semiconductor device may include a two-dimensional (2D) material layer having semiconductor characteristics, and a source electrode, a drain electrode, and a gate electrode spaced apart from one another on the 2D material layer. At least one of the source electrode and the drain electrode may be in contact with the 2D material layer and may include an alloy layer that may be amorphous.

公开(公告)号：US20240021679A1

公开(公告)日：2024-01-18

申请号：US18350433

申请日：2023-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Junyoung KWON ,  Keunwook SHIN ,  Minseok YOO

IPC: H01L29/24 ,  H01L29/66 ,  H01L29/786 ,  H01L29/78 ,  H01L29/775

CPC classification number: H01L29/24 ,  H01L29/66969 ,  H01L29/78696 ,  H01L29/7853 ,  H01L29/775 ,  H01L29/04

Abstract: A semiconductor device may include a two-dimensional material layer including a two-dimensional semiconductor material having a polycrystalline structure; metallic nanoparticles partially on the two-dimensional material layer; a source electrode and a drain electrode respectively on both sides of the two-dimensional material layer; and a gate insulating layer and a gate electrode on the two-dimensional material layer between the source electrode and the drain electrode.

公开(公告)号：US20230036321A1

公开(公告)日：2023-02-02

申请号：US17831950

申请日：2022-06-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Junyoung KWON ,  Minseok YOO

IPC: H01L29/10 ,  H01L29/78 ,  H01L29/417 ,  H01L21/8238

Abstract: Provided are a layer structure including a configuration capable of increasing the operation characteristics of a device including the layer structure, a method of manufacturing the layer structure, an electronic device including the layer structure, and an electronic apparatus including the electronic device. The layer structure includes a first layer and a second layer on one surface of the first layer and facing the first layer. The first layer and the second layer overlap each other. One layer of the first layer and the second layer has a trace of applied strain, and an other layer of the first layer and the second layer is a strain-inducing layer that applies a strain to the one layer.

公开(公告)号：US20220399228A1

公开(公告)日：2022-12-15

申请号：US17545468

申请日：2021-12-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Minsu SEOL ,  Sangwon KIM ,  Kyung-Eun BYUN ,  Hyeonjin SHIN

IPC: H01L21/768 ,  H01L23/532

Abstract: Disclosed are an interconnect structure, an electronic device including the same, and a method of manufacturing the interconnect structure. The interconnect structure includes a dielectric layer; a conductive interconnect on the dielectric layer; and a graphene cap layer on the conductive interconnect. The graphene cap layer contains graphene quantum dots, has a carbon content of 80 at % or more, and has an oxygen content of 15 at % or less.

公开(公告)号：US20210226010A1

公开(公告)日：2021-07-22

申请号：US17111965

申请日：2020-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Minsu SEOL ,  Hyeonjin SHIN

IPC: H01L29/10 ,  H01L29/36 ,  H01L29/423

Abstract: A transistor including at least one two-dimensional (2D) channel is disclosed. A transistor according to some example embodiments includes first to third electrodes separated from each other, and a channel layer that is in contact with the first and second electrodes, parallel to the third electrode, and includes at least one 2D channel. The at least one 2D channel includes at least two regions having different doping concentrations. A transistor according to some example embodiments includes: first to third electrodes separated from each other; a 2D channel layer that is in contact with the first and second electrodes and parallel to the third electrode; a first doping layer disposed under the 2D channel layer corresponding to the first electrode; and a second doping layer disposed under the 2D channel layer corresponding to the second electrode, wherein the first and second doping layers contact the 2D channel layer.

公开(公告)号：US20190016906A1

公开(公告)日：2019-01-17

申请号：US15944920

申请日：2018-04-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Sangwon KIM ,  Hyeonjin SHIN ,  Dongwook LEE ,  Seongjun PARK ,  Yunseong LEE ,  Seongjun JEONG ,  Alum JUNG

IPC: C09D7/63 ,  C07F3/02 ,  G03F7/16 ,  G03F7/20 ,  G03F7/38 ,  G03F7/32 ,  H01L21/311 ,  H01L21/3213

Abstract: Provided are a hardmask composition including a structure represented by Formula 1 and a solvent, a method of forming a pattern using the hardmask composition, and a hardmask formed from the hardmask composition. wherein in Formula 1, R1 to R8, X, and M are described in detail in the detailed description.

公开(公告)号：US20170025273A1

公开(公告)日：2017-01-26

申请号：US14984189

申请日：2015-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook SHIN ,  Minsu SEOL ,  Hyeonjin SHIN ,  Sangwon KIM ,  Seongjun PARK

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/311 ,  H01L21/3215 ,  H01L21/02

CPC classification number: H01L21/0332 ,  H01L21/02118 ,  H01L21/02274

Abstract: A 2D material hard mask includes hydrogen, oxygen, and a 2D material layer having a layered crystalline structure. The 2D material layer may be a material layer including one of a carbon structure (for example, a graphene sheet) and a non-carbon structure.

Abstract translation: 2D材料硬掩模包括氢，氧和具有层状晶体结构的2D材料层。 2D材料层可以是包括碳结构（例如，石墨烯片）和非碳结构之一的材料层。

公开(公告)号：US20240304622A1

公开(公告)日：2024-09-12

申请号：US18416403

申请日：2024-01-18

Applicant: Samsung Electronics Co., Ltd. ,  THE UNIVERSITY OF CHICAGO

Inventor： Minsu SEOL ,  Ce LIANG ,  Jiwoong PARK ,  Kyung-Eun BYUN ,  Changhyun KIM

IPC: H01L27/092 ,  H01L21/02 ,  H01L21/8256 ,  H01L29/24 ,  H01L29/66 ,  H01L29/76

CPC classification number: H01L27/092 ,  H01L21/02568 ,  H01L21/8256 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7606

Abstract: Provided are a semiconductor device including a two-dimensional material and a method of manufacturing the semiconductor device. The semiconductor device may include a substrate, first and second two-dimensional material layers on the substrate and junctioned to each other in a lateral direction to form a coherent interface, a first source electrode and a first drain electrode on the first two-dimensional material layer, a first gate electrode between the first source electrode and the first drain electrode, a second source electrode and a second drain electrode on the second two-dimensional material layer, and a second gate electrode between the second source electrode and the second drain electrode.

公开(公告)号：US20240234583A1

公开(公告)日：2024-07-11

申请号：US18397325

申请日：2023-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junyoung KWON ,  Kyung-Eun BYUN ,  Minsu SEOL

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L29/78696 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/7869

Abstract: Provided are a semiconductor device including a two-dimensional (2D) material and an electronic device including the semiconductor device. The semiconductor device may include a channel layer including a two-dimensional (2D) semiconductor material, a channel portion, and an extension portion on both sides of the channel portion, a source electrode and a drain electrode respectively on both sides of the channel layer, a gate electrode surrounding the channel portion, a first insulating layer between the channel portion of the channel layer and the gate electrode, and a second insulating layer on the extension portion of the channel layer. The second insulating layer may include a different material than a material of the first insulating layer. The second insulating layer may include a n-type dopant or p-type dopant. A dopant in the extension portion may be the same as a dopant in the second insulating layer.