- 专利标题: METHOD FOR MANUFACTURING WIRING BOARD AND LAYERED PLATE
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申请号: US18569217申请日: 2022-06-15
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公开(公告)号: US20240304462A1公开(公告)日: 2024-09-12
- 发明人: Masaya TOBA , Masaki YAMAGUCHI
- 申请人: Resonac Corporation
- 申请人地址: JP Minato-ku, Tokyo
- 专利权人: Resonac Corporation
- 当前专利权人: Resonac Corporation
- 当前专利权人地址: JP Minato-ku, Tokyo
- 优先权: WO TJP2021023092 2021.06.17
- 国际申请: PCT/JP2022/024007 2022.06.15
- 进入国家日期: 2023-12-12
- 主分类号: H01L21/48
- IPC分类号: H01L21/48 ; C23C18/16 ; C23C18/38 ; C23C28/02 ; C25D3/38 ; C25D5/02 ; C25D7/12 ; H01L23/12 ; H05K1/03 ; H05K3/18
摘要:
A method for manufacturing a wiring board includes steps of: (I) forming an insulation material layer on a surface of a support substrate; (II) forming a first conductive layer on a surface of the insulation material layer by electroless copper plating; (III) forming a first opening passing through the first conductive layer and the insulation material layer; (IV) forming a second conductive layer on a surface of the first conductive layer and on a bottom surface and a side surface of the first opening by electroless copper plating; (V) forming a resist pattern having a second opening communicating with the first opening on a surface of the second conductive layer; and (VI) filling the first opening and the second opening with a conductive material including copper by electrolytic copper plating.
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