A semiconductor device includes first power lines extending on a substrate in a first direction and spaced apart from each other in a second direction, back side power structures on a lower surface of the substrate, standard cells each including an active pattern, a gate pattern intersecting the active pattern, and contacts, power tap cells between at least some of the standard cells and each including vertical power vias, and second power lines electrically connecting at least some of the first power lines to each other. A first portion of the second power lines may extend onto the power tap cells and a second portion of the second power lines that is different from the first portion may extend onto the standard cells. The power tap cells may be arranged in every three or more rows of the standard cells in the second direction in a zigzag pattern.