INTEGRATED CIRCUIT INCLUDING CELLS OF DIFFERENT HEIGHTS AND METHOD OF DESIGNING THE INTEGRATED CIRCUIT

    公开(公告)号:US20220058326A1

    公开(公告)日:2022-02-24

    申请号:US17183630

    申请日:2021-02-24

    Abstract: An integrated circuit includes a first column including a plurality of first cells aligned and placed in a plurality of first rows, each first row having a first width and extending in a first horizontal direction, a second column including a plurality of second cells aligned and placed in a plurality of second rows, each second row having a second width and extending in the first horizontal direction, and an interface column extending in a second horizontal direction perpendicular to the first horizontal direction between the first column and the second column, wherein the interface column includes at least one well tap configured to provide a first supply voltage to a well, and at least one substrate tap configured to provide a second supply voltage to a substrate.

    SEMICONDUCTOR DEVICE
    3.
    发明申请

    公开(公告)号:US20200220548A1

    公开(公告)日:2020-07-09

    申请号:US16820835

    申请日:2020-03-17

    Abstract: A semiconductor device is provided. The semiconductor device includes first and second logic cells adjacent to each other on a substrate, and a mixed separation structure extending in a first direction between the first and second logic cells. Each logic cell includes first and second active fins that protrude from the substrate, the first and second active fins extending in a second direction intersecting the first direction and being spaced apart from each other in the first direction, and gate electrodes extending in the first direction and spanning the first and second active fins, and having a gate pitch. The mixed separation structure includes a first separation structure separating the first active fin of the first logic cell from the first active fin of the second logic cell; and a second separation structure on the first separation structure. A width of the first separation structure is greater than the gate pitch.

    SEMICONDUCTOR DEVICES
    4.
    发明申请

    公开(公告)号:US20240395713A1

    公开(公告)日:2024-11-28

    申请号:US18582859

    申请日:2024-02-21

    Abstract: A semiconductor device includes first power lines extending on a substrate in a first direction and spaced apart from each other in a second direction, back side power structures on a lower surface of the substrate, standard cells each including an active pattern, a gate pattern intersecting the active pattern, and contacts, power tap cells between at least some of the standard cells and each including vertical power vias, and second power lines electrically connecting at least some of the first power lines to each other. A first portion of the second power lines may extend onto the power tap cells and a second portion of the second power lines that is different from the first portion may extend onto the standard cells. The power tap cells may be arranged in every three or more rows of the standard cells in the second direction in a zigzag pattern.

    Semiconductor device
    6.
    发明授权

    公开(公告)号:US12068315B2

    公开(公告)日:2024-08-20

    申请号:US17323707

    申请日:2021-05-18

    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate including a first dummy region and a second dummy region spaced apart from the first dummy region; a device isolation layer filling a trench between the first dummy region and the second dummy region; a first dummy electrode provided on the first dummy region; a second dummy electrode provided on the second dummy region; a power line extending from the first dummy region to the second dummy region, the power line including an expanded portion provided on the device isolation layer, a width of the expanded portion being larger than a line width of a remaining portion of the power line; a power delivery network provided on a bottom surface of the substrate; and a through via extending through the substrate and the device isolation layer, and electrically connecting the power delivery network to the expanded portion. The through via and the expanded portion vertically overlap.

    INTEGRATED CIRCUIT INCLUDING STANDARD CELLS, AND METHOD OF DESIGNING THE INTEGRATED CIRCUIT

    公开(公告)号:US20220262786A1

    公开(公告)日:2022-08-18

    申请号:US17670626

    申请日:2022-02-14

    Abstract: An integrated circuit including a first standard cell placed continuously on a row having a first height and a row having a second height different from the first height. The integrated circuit also includes a second standard cell continuously placed on a row having the first height and a row having the second height, a plurality of first power lines formed on boundaries of the plurality of rows and configured to supply a first supply voltage to the standard cells, and a plurality of second power lines formed on boundaries of the plurality of rows and configured to supply a second supply voltage to the standard cells. A placement sequence of the power lines supplying a voltage to the first standard cell being different from a placement sequence of the power lines supplying a voltage to the second standard cell.

    INTEGRATED CIRCUIT INCLUDING SWITCH CELL AREA

    公开(公告)号:US20240234294A1

    公开(公告)日:2024-07-11

    申请号:US18393092

    申请日:2023-12-21

    CPC classification number: H01L23/50 H01L23/481 H01L23/5386 H01L25/16

    Abstract: An integrated circuit includes: a plurality of first power rails extending in a first horizontal direction and configured to provide a first power supply voltage that is applied thereto; a plurality of second power rails extending in the first horizontal direction and configured to provide a second power supply voltage that is applied thereto; and a power line in a switch cell area and extending in the first horizontal direction the power line being configured to provide a global power supply voltage that is applied thereto, wherein the plurality of first power rails and the plurality of second power rails are alternately arranged in a second horizontal direction vertical to the first horizontal direction, wherein the plurality of first power rails, the plurality of second power rails, and the power line form a front-side pattern on a same layer, and wherein the power line is provided between two second power rails adjacent to each other in the first horizontal direction, among the plurality of second power rails.

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