发明授权
- 专利标题: Semiconductor device and its fabrication method
- 专利标题(中): 半导体器件及其制造方法
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申请号: US164801申请日: 1993-12-10
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公开(公告)号: US5481120A公开(公告)日: 1996-01-02
- 发明人: Kazuhiro Mochizuki , Tomoyoshi Mishima , Tohru Nakamura , Hiroshi Masuda , Tomonori Tanoue , Tooru Haga , Yoshihisa Fujisaki
- 申请人: Kazuhiro Mochizuki , Tomoyoshi Mishima , Tohru Nakamura , Hiroshi Masuda , Tomonori Tanoue , Tooru Haga , Yoshihisa Fujisaki
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX4-347688 19921228; JPX5-053722 19930315
- 主分类号: H01L21/331
- IPC分类号: H01L21/331 ; H01L29/08 ; H01L29/20 ; H01L29/45 ; H01L29/737 ; H01L29/80 ; H01S5/042 ; H01S5/183 ; H01S5/22 ; H01S5/323 ; H01L27/02
摘要:
Disclosed is a semiconductor device using a polycrystalline compound semiconductor with a low resistance as a low resistance layer, and its fabrication method. The above polycrystalline compound semiconductor layer is doped with C or Be as impurities in a large amount, and is extremely low in resistance. The polycrystalline compound semiconductor layer is formed by either of a molecular beam epitaxy method, an organometallic vapor phase epitaxy method and an organometallic molecular beam epitaxy method under the condition that a substrate temperature is 450.degree. C. or less and the ratio of partial pressure of a V-group element to a III-group element is 50 or more. In the case that the above polycrystaline compound semiconductor layer with a low resistance is used as an extrinsic base region of an heterojunction bipolar transistor, since the extrinsic base region can be formed on a dielectric film formed on a collector, it is possible to reduce the base-collector capacitance, and hence to enhance the operational speed of the heterojunction bipolar transistor.
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