发明授权
US5634267A Method and apparatus for manufacturing known good semiconductor die
失效
用于制造已知的良好半导体管芯的方法和装置
- 专利标题: Method and apparatus for manufacturing known good semiconductor die
- 专利标题(中): 用于制造已知的良好半导体管芯的方法和装置
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申请号: US338345申请日: 1994-11-14
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公开(公告)号: US5634267A公开(公告)日: 1997-06-03
- 发明人: Warren Farnworth , Alan Wood
- 申请人: Warren Farnworth , Alan Wood
- 申请人地址: ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: ID Boise
- 主分类号: G01R1/04
- IPC分类号: G01R1/04 ; G01R1/067 ; G01R1/073 ; G01R3/00 ; G01R31/28 ; H01L21/60 ; H01L21/66 ; H01L21/68 ; H01L23/13 ; H01L23/498 ; H05K3/00 ; H05K3/40 ; H05K3/42 ; H05K3/34
摘要:
A method and apparatus for fabricating known good semiconductor dice are provided. The method includes the steps of: testing the gross functionality of dice contained on a semiconductor wafer; sawing the wafer to singulate a die; and then testing the die by assembly in a carrier having an interconnect adapted to establish electrical communication between the bond pads on the die and external test circuitry. The interconnect for the carrier can be formed using different contact technologies including: thick film contact members on a rigid substrate; self-limiting contact members on a silicon substrate; or microbump contact members with a textured surface. During assembly of the carrier, the die and interconnect are optically aligned and placed into contact with a predetermined contact force. This establishes an electrical connection between the contact members on the interconnect and the bond pads of the die. In the assembled carrier the die and interconnect are biased together by a force distribution mechanism that includes a bridge clamp, a pressure plate and a spring clip. Following testing of the die, the carrier is disassembled and the tested die is removed.
公开/授权文献
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