A semiconductor system includes a plurality of semiconductor chips, a first group of wirings, a second group of wirings and a connection rearrange wiring section. The first group of wirings interconnect the plurality of semiconductor chips. The second group of wirings are used for redundancy and interconnect the plurality of semiconductor chips. The connection rearrange wiring section includes a connection test circuit and connection rearrange circuit. The connection test circuit makes a test for connection between the plurality of semiconductor chips by means of the first group of wirings. The connection rearrange circuit makes unusable a wiring of the first group in which poor connection occurs and rearranges the connection between the semiconductor chips by use of the wiring of the second group when the poor connection is detected in the wiring of the first group by the connection test circuit.