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    Semiconductor Integrated Circuit
    1.
    发明申请
    Semiconductor Integrated Circuit 失效
    半导体集成电路

    公开(公告)号：US20080308945A1

    公开(公告)日：2008-12-18

    申请号：US12137623

    申请日：2008-06-12

    申请人： Takeshi Ishigaki ,  Noriaki Matsunaga

    发明人： Takeshi Ishigaki ,  Noriaki Matsunaga

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76816 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor integrated circuit according to an example of the present invention includes a first interconnect extending in a first direction, a second interconnect arranged over the first interconnect and extending in a second direction intersecting the first direction, a first via for connecting a first contact part of the first interconnect and a second contact part of the second interconnect, and a second via for connecting a third contact part of the first interconnect and a fourth contact part of the second interconnect. The first and third contact parts are arranged by being aligned in the first direction, and the second and fourth contact parts are arranged by being aligned in the second direction.

    摘要翻译： 根据本发明的示例的半导体集成电路包括：沿第一方向延伸的第一互连，布置在第一互连上并沿与第一方向相交的第二方向延伸的第二互连;第一通孔，用于连接第一接触部分 和第二互连的第二接触部分，以及用于连接第一互连的第三接触部分和第二互连的第四接触部分的第二通孔。 第一接触部和第三接触部通过沿第一方向排列配置，第二接触部和第四接触部通过沿第二方向对准而配置。

    Semiconductor Integrated Circuit Device and Method of Outputting Signals on Semiconductor Integrated Circuit
    2.
    发明申请
    Semiconductor Integrated Circuit Device and Method of Outputting Signals on Semiconductor Integrated Circuit 失效
    半导体集成电路器件及其在半导体集成电路中输出信号的方法

    公开(公告)号：US20070296471A1

    公开(公告)日：2007-12-27

    申请号：US10586951

    申请日：2005-08-15

    申请人： Takeshi Ishigaki

    发明人： Takeshi Ishigaki

    IPC分类号： H03L7/07

    CPC分类号： G06F1/24

    摘要： A semiconductor integrated circuit device includes a semiconductor substrate having a first area. A first counter is provided in the first area, cyclically counts and outputs a first counter signal as a result of counting. A global reset circuit is provided on the semiconductor substrate and outputs a global reset signal. A first local reset circuit is provided in the first area and outputs a first local reset signal upon receiving the first counter signal of a set value after supplied with the global reset signal. A first circuit is provided in the first area and supplied with the first local reset signal.

    摘要翻译： 半导体集成电路器件包括具有第一区域的半导体衬底。 在第一区域中设置第一计数器，作为计数的结果循环计数并输出第一计数器信号。 在半导体衬底上提供全局复位电路并输出全局复位信号。 第一本地复位电路设置在第一区域中，并且在提供全局复位信号之后接收到设定值的第一计数器信号时，输出第一本地复位信号。 第一电路设置在第一区域并提供第一本地复位信号。

    Spiro derivatives and adhesion molecule inhibitors comprising the same as active ingredient
    3.
    发明申请
    Spiro derivatives and adhesion molecule inhibitors comprising the same as active ingredient 审中-公开
    包含与活性成分相同的螺衍生物和粘附分子抑制剂

    公开(公告)号：US20060241132A1

    公开(公告)日：2006-10-26

    申请号：US10508500

    申请日：2003-03-19

    申请人： Takeshi Ishigaki ,  Koji Taniguchi ,  Aki Taniguchi ,  Mie Kainoh ,  Hiroyuki Meguro ,  Yoko Ishizaka

    发明人： Takeshi Ishigaki ,  Koji Taniguchi ,  Aki Taniguchi ,  Mie Kainoh ,  Hiroyuki Meguro ,  Yoko Ishizaka

    IPC分类号： A61K31/4747 ,  C07D498/10

    CPC分类号： C07K5/06139 ,  C07D471/10

    摘要： Disclosed is the use of an adhesion molecule inhibitor that is effective in the prevention and treatment of inflammatory diseases caused by infiltration of leukocytes such as monocytes, lymphocytes and eosindphils, by inhibiting cell infiltration which mediates adhesion molecules, especially adhesion molecule VLA-4. Since the spiro acid derivatives according to the present invention are excellent in the effect of inhibiting cell adhesion via adhesion molecules, especially adhesion molecule VLA-4, they are useful as therapeutic drugs against various inflammatory diseases. For example, provided are the spiro derivative and the adhesion molecule inhibitor which includes as an active ingredient the spiro derivative as shown by the below formula (18).

    摘要翻译： 公开了通过抑制介导粘附分子特别是粘附分子VLA-4的细胞浸润，有效地预防和治疗由白细胞如单核细胞，淋巴细胞和嗜酸性粒细胞浸润引起的炎性疾病的粘附分子抑制剂的用途。 由于根据本发明的螺酸衍生物通过粘附分子特别是粘附分子VLA-4抑制细胞粘附的效果优异，因此它们可用作抗各种炎性疾病的治疗药物。 例如，可列举如下式（18）所示的作为活性成分的螺衍生物的螺衍生物和粘附分子抑制剂。

    Method for designing a semiconductor integrated circuit and a semiconductor integrated circuit
    6.
    发明申请
    Method for designing a semiconductor integrated circuit and a semiconductor integrated circuit 审中-公开
    半导体集成电路和半导体集成电路的设计方法

    公开(公告)号：US20050155001A1

    公开(公告)日：2005-07-14

    申请号：US10988658

    申请日：2004-11-16

    申请人： Koichi Kinoshita ,  Takeshi Ishigaki ,  Yukihiro Urakawa

    发明人： Koichi Kinoshita ,  Takeshi Ishigaki ,  Yukihiro Urakawa

    IPC分类号： G06F17/50 ,  H01L21/82

    CPC分类号： G06F17/5045

    摘要： A method for designing a semiconductor integrated circuit, includes placing first, second and third cells, respectively including first stage synchronous circuit having signal propagation time, second stage synchronous circuit having a signal propagation time almost equal to the first stage synchronous circuit, and logic circuit; routing wirings so as to electrically connect the first to third cells; verifying signal propagation timing of the semiconductor integrated circuit having the first to third cells; adjusting the signal propagation timing based on critical path of the signal propagation timing of the semiconductor integrated circuit; and extracting the critical path to replace the second stage synchronous circuit by synchronous circuit of different synchronous type from the first stage synchronous circuit so as to provide a shorter signal propagation time than the first stage synchronous circuit.

    摘要翻译： 一种用于设计半导体集成电路的方法，包括分别包括具有信号传播时间的第一级同步电路的第一，第二和第三单元，具有几乎等于第一级同步电路的信号传播时间的第二级同步电路和逻辑电路 ; 路由布线以便电连接第一至第三单元; 验证具有第一至第三小区的半导体集成电路的信号传播定时; 基于半导体集成电路的信号传播定时的关键路径调整信号传播定时; 并通过与第一级同步电路不同同步型的同步电路提取替代第二级同步电路的关键路径，以提供比第一级同步电路更短的信号传播时间。

    Semiconductor integrated circuit
    7.
    发明授权
    Semiconductor integrated circuit 失效
    半导体集成电路

    公开(公告)号：US07999390B2

    公开(公告)日：2011-08-16

    申请号：US12137623

    申请日：2008-06-12

    申请人： Takeshi Ishigaki ,  Noriaki Matsunaga

    发明人： Takeshi Ishigaki ,  Noriaki Matsunaga

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76816 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor integrated circuit according to an example of the present invention includes a first interconnect extending in a first direction, a second interconnect arranged over the first interconnect and extending in a second direction intersecting the first direction, a first via for connecting a first contact part of the first interconnect and a second contact part of the second interconnect, and a second via for connecting a third contact part of the first interconnect and a fourth contact part of the second interconnect. The first and third contact parts are arranged by being aligned in the first direction, and the second and fourth contact parts are arranged by being aligned in the second direction.

    摘要翻译： 根据本发明的示例的半导体集成电路包括：沿第一方向延伸的第一互连，布置在第一互连上并沿与第一方向相交的第二方向延伸的第二互连;第一通孔，用于连接第一接触部分 和第二互连的第二接触部分，以及用于连接第一互连的第三接触部分和第二互连的第四接触部分的第二通孔。 第一接触部和第三接触部通过沿第一方向排列配置，第二接触部和第四接触部通过沿第二方向对准而配置。

    Semiconductor integrated circuit device and method of outputting signals on semiconductor integrated circuit
    8.
    发明授权
    Semiconductor integrated circuit device and method of outputting signals on semiconductor integrated circuit 失效
    半导体集成电路装置及半导体集成电路输出信号的方法

    公开(公告)号：US07528642B2

    公开(公告)日：2009-05-05

    申请号：US10586951

    申请日：2005-08-15

    申请人： Takeshi Ishigaki

    发明人： Takeshi Ishigaki

    IPC分类号： G06F1/04 ,  H03K3/00

    CPC分类号： G06F1/24

    摘要： A semiconductor integrated circuit device includes a semiconductor substrate having a first area. A first counter is provided in the first area, cyclically counts and outputs a first counter signal as a result of counting. A global reset circuit is provided on the semiconductor substrate and outputs a global reset signal. A first local reset circuit is provided in the first area and outputs a first local reset signal upon receiving the first counter signal of a set value after supplied with the global reset signal. A first circuit is provided in the first area and supplied with the first local reset signal.

    摘要翻译： 半导体集成电路器件包括具有第一区域的半导体衬底。 在第一区域中设置第一计数器，作为计数的结果循环计数并输出第一计数器信号。 在半导体衬底上提供全局复位电路并输出全局复位信号。 第一本地复位电路设置在第一区域中，并且在提供全局复位信号之后接收到设定值的第一计数器信号时，输出第一本地复位信号。 第一电路设置在第一区域并提供第一本地复位信号。