发明授权
US06897499B2 Semiconductor integrated circuit device including MISFETs each with a gate electrode extended over a boundary region between an active region and an element isolation trench
失效
包括MISFET的半导体集成电路器件,每个MISFET均具有在有源区和元件隔离沟槽之间的边界区域上延伸的栅电极
- 专利标题: Semiconductor integrated circuit device including MISFETs each with a gate electrode extended over a boundary region between an active region and an element isolation trench
- 专利标题(中): 包括MISFET的半导体集成电路器件,每个MISFET均具有在有源区和元件隔离沟槽之间的边界区域上延伸的栅电极
-
申请号: US10359678申请日: 2003-02-07
-
公开(公告)号: US06897499B2公开(公告)日: 2005-05-24
- 发明人: Akio Nishida , Noriyuki Yabuoshi , Yasuko Yoshida , Kazuhiro Komori , Sousuke Tsuji , Hideo Miwa , Mitsuhiro Higuchi , Koichi Imato
- 申请人: Akio Nishida , Noriyuki Yabuoshi , Yasuko Yoshida , Kazuhiro Komori , Sousuke Tsuji , Hideo Miwa , Mitsuhiro Higuchi , Koichi Imato
- 申请人地址: JP Tokyo JP Tokyo
- 专利权人: Renesas Technology Corp.,Hitachi ULSI Systems Co., Ltd.
- 当前专利权人: Renesas Technology Corp.,Hitachi ULSI Systems Co., Ltd.
- 当前专利权人地址: JP Tokyo JP Tokyo
- 代理机构: Antonelli, Terry, Stout & Kraus, LLP
- 优先权: JP2000-024465 20000201
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234 ; G11C11/412 ; H01L21/335 ; H01L21/8244 ; H01L27/088 ; H01L27/105 ; H01L27/11 ; H01L29/423 ; H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119
摘要:
A gate electrode of each MISFET is formed on a substrate in an active region whose periphery is defined by an element isolation trench, and crosses the active region so as to extend from one end thereof to the other end thereof. The gate electrode has a gate length in a boundary region defined between the active region and the element isolation trench which is greater than a gate length in a central portion of the active region. The gate electrode is configured in an H-type flat pattern. Further, the gate electrode covers the whole of one side extending along a gate-length direction, of the boundary region defined between the active region L and the element isolation trench, and parts of two sides thereof extending along a gate-width direction. The MISFETs are formed in electrically separated wells and are connected in series to constitute part of a reference voltage generating circuit.