Invention Grant
- Patent Title: Method for manufacturing a MOS transistor
- Patent Title (中): MOS晶体管的制造方法
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Application No.: US10411098Application Date: 2003-04-11
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Publication No.: US06936503B2Publication Date: 2005-08-30
- Inventor: Shinobu Takehiro
- Applicant: Shinobu Takehiro
- Applicant Address: JP Tokyo
- Assignee: Oki Electric Industry Co., Ltd.
- Current Assignee: Oki Electric Industry Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Volentine Francos & Whitt, PLLC
- Priority: JPP2002-182909 20020624
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/316 ; H01L21/8234 ; H01L27/088 ; H01L29/51 ; H01L29/78 ; H01L21/335 ; H01L21/8232

Abstract:
In a pretreatment process, a silicon oxide film (13) with nitrogen content is formed on a semiconductor substrate (10). In a segregation process executing heat treatment in an in-oxidiz-able gas atmosphere, a silicon nitride layer (14) segregates out at the interface of the silicon substrate (10) and the silicon oxide film (13). After this, the unnecessary silicon oxide film (13) on the silicon nitride layer (14) is removed, and a silicon oxide layer (15) is formed beneath the exposed silicon nitride layer (14) with oxygen passing through the exposed silicon nitride layer (14). Whereby, a gate electrode (16) is formed on the gate insulating film consisting of the silicon nitride layer (14) and the silicon oxide layer (15).
Public/Granted literature
- US20030235965A1 Method for manufacturing a MOS transistor Public/Granted day:2003-12-25
Information query
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