发明授权
- 专利标题： Interconnect structure having a silicide/germanide cap layer
- 专利标题（中）： 具有硅化物/锗化物覆盖层的互连结构
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申请号： US12500796申请日： 2009-07-10
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公开(公告)号： US08143162B2公开(公告)日： 2012-03-27
- 发明人: Chen-Hua Yu , Yung-Cheng Lu , Hui-Lin Chang , Ting-Yu Shen , Hung Chun Tsai
- 申请人： Chen-Hua Yu , Yung-Cheng Lu , Hui-Lin Chang , Ting-Yu Shen , Hung Chun Tsai
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： Slater & Matsil, L.L.P.
- 主分类号： H01L21/44
- IPC分类号： H01L21/44 ; H01L27/04
摘要：
An interconnect structure of an integrated circuit and a method for forming the same are provided. The interconnect structure includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, a conductor in the low-k dielectric layer, and a cap layer on the conductor. The cap layer has at least a top portion comprising a metal silicide/germanide.
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