A technique for suppressing lowering of withstand voltage and lowering of breakdown resistance and reducing a feedback capacitance of a power MISFET is provided. A lateral power MISFET that comprises a trench region whose insulating layer is formed shallower than an HV-Nwell layer is provided in the HV-Nwell layer (drift region) formed on a main surface of a semiconductor substrate in a direction from the main surface to the inside. The lateral power MISFET has an arrangement on a plane of the main surface including a source layer (source region) and a drain layer (drain region) arranged at opposite sides to each other across a gate electrode (first conducting layer), and a dummy gate electrode (second conducting layer) that is different from the gate electrode is arranged between the gate electrode and the drain layer.