Invention Grant
- Patent Title: Package test devices having a printed circuit board
- Patent Title (中): 具有印刷电路板的封装测试装置
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Application No.: US13780891Application Date: 2013-02-28
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Publication No.: US08832638B2Publication Date: 2014-09-09
- Inventor: Jae-Hoon Jeong , Chang-Woo Ko , Ki-Jae Song , Hun-Kyo Seo
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR10-2009-0060821 20090703
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G01R1/04 ; G01R31/28 ; G11C29/56

Abstract:
In a method of designing a printed circuit board, a package capacitance, a package inductance, and a chip capacitance of an actual memory device are calculated. A signal line capacitance and a signal line inductance per unit length of a signal line are calculated based on characteristics of the printed circuit board. A length of the signal line for each pin is determined based on the package capacitance and the signal line capacitance.
Public/Granted literature
- US20130176045A1 PACKAGE TEST DEVICES HAVING A PRINTED CIRCUIT BOARD Public/Granted day:2013-07-11
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