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公开(公告)号:US08832638B2
公开(公告)日:2014-09-09
申请号:US13780891
申请日:2013-02-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae-Hoon Jeong , Chang-Woo Ko , Ki-Jae Song , Hun-Kyo Seo
CPC classification number: G01R1/0408 , G01R31/2808 , G06F17/5068 , G11C29/56 , G11C2029/5602
Abstract: In a method of designing a printed circuit board, a package capacitance, a package inductance, and a chip capacitance of an actual memory device are calculated. A signal line capacitance and a signal line inductance per unit length of a signal line are calculated based on characteristics of the printed circuit board. A length of the signal line for each pin is determined based on the package capacitance and the signal line capacitance.
Abstract translation: 在设计印刷电路板的方法中,计算实际存储器件的封装电容,封装电感和芯片电容。 基于印刷电路板的特性来计算信号线的每单位长度的信号线电容和信号线电感。 基于封装电容和信号线电容确定每个引脚的信号线的长度。
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公开(公告)号:US20130176045A1
公开(公告)日:2013-07-11
申请号:US13780891
申请日:2013-02-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jae-Hoon Jeong , Chang-Woo Ko , Ki-Jae Song , Hun-Kyo Seo
IPC: G01R1/04
CPC classification number: G01R1/0408 , G01R31/2808 , G06F17/5068 , G11C29/56 , G11C2029/5602
Abstract: In a method of designing a printed circuit board, a package capacitance, a package inductance, and a chip capacitance of an actual memory device are calculated. A signal line capacitance and a signal line inductance per unit length of a signal line are calculated based on characteristics of the printed circuit board. A length of the signal line for each pin is determined based on the package capacitance and the signal line capacitance.
Abstract translation: 在设计印刷电路板的方法中,计算实际存储器件的封装电容,封装电感和芯片电容。 基于印刷电路板的特性来计算信号线的每单位长度的信号线电容和信号线电感。 基于封装电容和信号线电容确定每个引脚的信号线的长度。
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