Invention Grant
- Patent Title: 3D semiconductor device
- Patent Title (中): 3D半导体器件
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Application No.: US14262693Application Date: 2014-04-25
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Publication No.: US09245827B2Publication Date: 2016-01-26
- Inventor: Uk-song Kang , Dong-hyeon Jang , Seong-jin Jang , Hoon Lee , Jin-ho Kim , Nam-seog Kim , Byung-sik Moon , Woo-dong Lee
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do
- Agency: Muir Patent Law, PLLC
- Priority: KR10-2010-0048616 20100525
- Main IPC: G11C5/06
- IPC: G11C5/06 ; H01L23/48 ; H01L25/065 ; H01L25/00 ; G11C8/18 ; H01L21/66 ; H01L23/00

Abstract:
A three-dimensional (3D) semiconductor device may include a stack of chips, including a master chip and one or more slave chips. I/O connections of slave chips need not be connected to channels on a motherboard, and only electrode pads of a master chip may be connected to the channels. Only the master chip may provide a load to the channels. A through-substrate via (TSV) boundary may be set on a data input path, a data output path, an address/command path, and/or a clock path of a semiconductor device in which the same type of semiconductor chips are stacked.
Public/Granted literature
- US20140233292A1 3D SEMICONDUCTOR DEVICE Public/Granted day:2014-08-21
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