Invention Grant
- Patent Title: Frequency-locked loop circuit and semiconductor integrated circuit
- Patent Title (中): 锁相环电路和半导体集成电路
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Application No.: US14244800Application Date: 2014-04-03
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Publication No.: US09276585B2Publication Date: 2016-03-01
- Inventor: Takashi Nakamura , Kosuke Yayama , Masaaki Iijima
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2013-087802 20130418
- Main IPC: H03L7/099
- IPC: H03L7/099 ; H03L1/02 ; H03L7/02 ; H03L7/06 ; H03L7/00 ; H03L7/16 ; H03L7/22

Abstract:
A frequency-locked loop circuit has a digital control oscillator that generates a clock, and an FLL controller that generates a frequency control code to control an oscillation frequency of the clock. The FLL controller has a frequency comparison unit and a delay code control unit. The frequency comparison unit compares a frequency of a clock generated by the digital control oscillator with a frequency of a multiplied reference clock. The delay code control unit generates, based on a comparison result of the frequency comparison unit, the frequency control code so that the frequency of the clock generated by the digital control oscillator matches the frequency of the multiplied reference clock. The frequency comparison unit determines the frequency of the clock by using first and second thresholds. The delay code control unit generates the frequency control code according to a determination of the frequency comparison unit.
Public/Granted literature
- US20140312981A1 FREQUENCY-LOCKED LOOP CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2014-10-23
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