Invention Grant
US09299795B2 Partial sacrificial dummy gate with CMOS device with high-k metal gate 有权
具有高k金属栅极的CMOS器件的部分牺牲伪栅极

Partial sacrificial dummy gate with CMOS device with high-k metal gate
Abstract:
A gate structure in a semiconductor device includes: a gate stack formed on a substrate with three sections, a bottom portion, a top portion, and a sacrificial cap layer over the top portion; gate spacers, source and drain regions, a nitride encapsulation over top and sidewalls of the gate stack after removal of the sacrificial cap layer, an organic planarizing layer over the nitride encapsulation, planarizing the encapsulation, and silicidation performed over the source and drain regions and the bottom portion after removal of the nitride encapsulation, the organic planarizing layer, and the top portion of the gate stack.
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