Invention Grant
- Patent Title: Gate dielectric protection for transistors
- Patent Title (中): 晶体管的栅极绝缘保护
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Application No.: US14321679Application Date: 2014-07-01
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Publication No.: US09324822B2Publication Date: 2016-04-26
- Inventor: Andreas Kerber , Suresh Uppal , Salvatore Cimino , Hao Jiang
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams Morgan, P.C.
- Main IPC: H01L29/00
- IPC: H01L29/00 ; H01L21/00 ; H01L29/423 ; H01L21/66 ; H01L29/08 ; H01L21/28 ; H01L21/762 ; H01L29/06 ; H01L29/49 ; H01L29/66 ; H01L29/78 ; G01R31/26

Abstract:
At least one method, apparatus and system disclosed herein involves forming a device comprising a transistor comprising an active gate and at least one inactive gate in parallel to the active gate. A source region on a substrate is formed. An active gate region is formed on the substrate adjacent the source region. A drain region is formed on the substrate adjacent the active gate region. A first inactive gate region is formed on the substrate in parallel to the active gate region. The source region, the drain region, the active gate region, and the first inactive gate region comprise the transistor. The first inactive gate region is capable of dissipating the at least a portion of a charge.
Public/Granted literature
- US20160005828A1 GATE DIELECTRIC PROTECTION FOR TRANSISTORS Public/Granted day:2016-01-07
Information query
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