Invention Grant
- Patent Title: Die-stacked memory device with reconfigurable logic
- Patent Title (中): 具有可重构逻辑的堆叠式存储器件
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Application No.: US14551147Application Date: 2014-11-24
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Publication No.: US09344091B2Publication Date: 2016-05-17
- Inventor: Nuwan S. Jayasena , Michael J. Schulte , Gabriel H. Loh , Michael Ignatowski
- Applicant: Advanced Micro Devices, Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H03K19/177
- IPC: H03K19/177 ; G11C7/00 ; G06F15/78 ; G06F13/16 ; G06F11/10 ; G06F13/42 ; G11C7/10 ; G11C29/00

Abstract:
A die-stacked memory device incorporates a reconfigurable logic device to provide implementation flexibility in performing various data manipulation operations and other memory operations that use data stored in the die-stacked memory device or that result in data that is to be stored in the die-stacked memory device. One or more configuration files representing corresponding logic configurations for the reconfigurable logic device can be stored in a configuration store at the die-stacked memory device, and a configuration controller can program a reconfigurable logic fabric of the reconfigurable logic device using a selected one of the configuration files. Due to the integration of the logic dies and the memory dies, the reconfigurable logic device can perform various data manipulation operations with higher bandwidth and lower latency and power consumption compared to devices external to the die-stacked memory device.
Public/Granted literature
- US20150155876A1 DIE-STACKED MEMORY DEVICE WITH RECONFIGURABLE LOGIC Public/Granted day:2015-06-04
Information query
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